CONTACT USPlease enter your name. Please enter alphabets only for Name. Please enter Organization. Please enter valid email id. Please enter Phone number. Please enter numeric only for Phone number.
This blog is published byhmblog
Going with the norm is treading a relatively easy path. Going against the flow brings its own set of challenges. If all that you do is try to disrupt what exists, the complications are that much more.
Babu K. C., general manager and head, Hardware Practice, and Divya Sasidharan, engineering manager, from Happiest Minds, talk to Dilin Anand and Priya Ravindran of EFY about dealing with disruptive technologies and the challenges that crop up along the way.
Q: Disruptive technologies, as the name suggests, disrupt what is already there. How challenging is it to go about creating a project description or design flow in this domain?
A: Given the product and system specifications, arriving at a specification document that is both agreeable to the customer and feasible from a design point of view is the biggest challenge when it comes to disruptive technology. With no base to work on, coming up with an optimum architecture is also a task. At every stage, there might be problems regarding compatibility or how the system responds to change, and it is a constant trial and error process. It is all about being open-minded and ready to work with, or try out new methods.
Q: Given the challenges, how do you approach a project in this domain? What special care do you need to take?
A. The first thing needed is good engineers with the latest skill-sets, those who understand the latest technologies and are passionate to work in these fields. We also require a good lab infrastructure to test the designs, and a good ecosystem that supports fabrication and assembly of boards. We have a strong team in place already, most of them hand-picked from the industry and we are recruiting top-notch engineers on a regular basis. We make sure the engineers we recruit understand the latest technologies and they are capable of facing the design challenges. We have a good lab infrastructure and can do most of the design qualification tests in-house. We use external labs when it comes to electromagnetic interference/electromagnetic compability (EMI/EMC) tests. We make sure our designs are ‘first-time-right’ by doing multiple rounds of reviews at all the stages of the design cycle.
Q: What, according to you, is the most disruptive technology at the moment?
A: That would be the Internet of Things (IoT). There is a tendency to connect and manage almost all gadgets or equipment remotely through the Internet. We are getting several requests for proposals (RFPs) for developing IoT products. Almost all the new designs call for Internet connectivity by default and many companies are looking at adding IoT features to their legacy products.
Q: How would you go about choosing a processor for a design?
A: Factors like performance and interface requirements take prominence. Speed and power requirements, cost, availability of components and support for the chip from the vendor are also parameters we need to take into account.
Q: What are the biggest technological challenges you face while working on these projects?
A: One of the biggest challenges we face is the space constraint on the printed circuit board (PCB). Customers generally desire the boards to be as small as possible, with maximum features in it. If you add other dimensions such as low-cost, we will have to rule out using high-density interconnects (HDIs), although the density demands to have them. Fitting components into a limited space, without using HDIs and without compromising on the performance, signal integrity or thermal aspects is often quite challenging. In terms of these aspects, each project poses a unique challenge, and to overcome this, we have to adopt a different strategy each time. We often have to risk deviating from guidelines.
A few of the other challenges we face are in managing thermal issues (especially in fan-less designs), passing EMI/ EMC compliance tests and meeting the power or cost budgets while selecting the right architecture for a design. Overcoming these challenges requires a highly-experienced and dedicated design team with a good set of tools and infrastructure to aid in developing and testing the designs.
Q: Are there any additional challenges that can be attributed exclusively to the disruption angle?
A: Managing design feasibility, processor/component and cost parameters and arriving at a balance is a challenge on its own. Another difficulty comes while integrating analogue sensors with the board. While working with chips that are just in the market, there is always a risk of finding bugs or errors. Also, you may run the risk of a certain component not being ready for sale in the market when you go in for manufacturing. This is where the time-scale factor comes into the picture.
Q. Could you share some ways of tackling the space-size challenge?
A. Devices sizes are always shrinking and we end up putting so many features in a very small size. Component selection becomes an important criterion whenever there is a space-size challenge. Optimised component placement and use of HDIs on the printed circuit board PCB help in arriving at the target size. PCB features such as trace-width, via size and trace-trace clearance will have to be extremely minimised to achieve some of the form-factor requirements. However, there is a limitation in manufacturing these boards in India as the fabricators do not have sophisticated equipment to build these boards. Cooling such high-density designs packed in a small area would be another challenge.
Q. How do you manage thermal issues in fan-less designs?
A. During the design phase, extensive thermal analysis is done starting with component-level heat calculations, followed by board-level tool-based thermal simulation, to estimate the amount of heat generated at the maximum power the system is designed for. Proper copper areas on the board, appropriate heat-sink designs and selection of right thermal interface material help to keep the design cool even at extreme temperatures. In some cases, the enclosure also will need to act as a heat dissipater. The choice of enclosure material and proper thermal design becomes critical here.
Q. What compromises have to be made to comply with EMI/ EMC tests?
A. Appropriate ground references and proper return paths help in reducing the electromagnetic emissions, which may add additional board area or more number of layers. Circuits may demand additional devices for electrostatic discharge (ESD) and surge protection. Chassis-based systems may need gasket or copper strips to seal gaps to prevent radiations, which adds to the cost of the system. Getting the design to pass EMI/EMC certification test might involve multiple re-spins, which impact the development time and also add to the development cost.
Q: Has there been any unique situation you have come across so far?
A: We had to debug and fix a thermal issue on one of our customer’s hardware. This was an x86-based design, running Windows. The board used to crash after some time when exposed to temperatures above normal room temperature. Even though the board was designed for extreme temperatures, it was not working as expected. We had to do a detailed thermal analysis, including thermal simulation using standard tools and did several tests inside a thermal chamber to identify and fix that problem, by re-designing the heat sink. In fact, we had to reduce the heat sink area to fix this issue, whereas, generally, fixing thermal issues calls for increasing the heat sink area.
Published in: Electronics For You
These blogs might interest you
by Praveen Matam on 28 Apr 2021
by Adarsh BU on 31 Mar 2021
by Kadiyam Neelima on 3 Mar 2021
by Veena Sriram on 2 Mar 2021
Subscribe for blog updates
ABOUT HAPPIEST MINDS
Happiest Minds enables Digital Transformation for enterprises and technology providers by delivering seamless customer experience, business efficiency and actionable insights through an integrated set of disruptive technologies: big data analytics, internet of things, mobility, cloud, security, unified communications, etc...